Pamunuwa, Dinesh
Modelling and analysis of interconnects for deep submicron systems- on-chip - Stockholm Royal Institute of Technology 2003 - xiv, 163p. : ill., charts, tables
9172836318
DELAY AND NOISE MODELLING IN VLSI CIRCUITS
CROSS-TALK
INTERCONNECT MODELLING
Timing analysis
Transfer function
On-chip bus
Bandwidth maximization
Throughput maximization
Repeater insertion
Wire optimization
621.3.049.77 / P3
Modelling and analysis of interconnects for deep submicron systems- on-chip - Stockholm Royal Institute of Technology 2003 - xiv, 163p. : ill., charts, tables
9172836318
DELAY AND NOISE MODELLING IN VLSI CIRCUITS
CROSS-TALK
INTERCONNECT MODELLING
Timing analysis
Transfer function
On-chip bus
Bandwidth maximization
Throughput maximization
Repeater insertion
Wire optimization
621.3.049.77 / P3